There is often a need to perform garbage collection and other compactions operations to copy a word line of data from a source page to a destination page in memory. There are several ways in which the data can be moved. For example, an “off-chip copy” operation can be used, in which the word line of data is read from a source page and transferred over a bus to a controller and is then transferred back over the bus to the memory and written to a destination page. To avoid transferring data back and forth over the controller-memory bus, an “on-chip copy” operation can be used, in which a word line of data is read from a source page, written into data latches in the memory chip, and then written to a destination page. Although on-chip copy is faster than off-chip copy since it avoids toggling the data between the controller and the memory, there are some disadvantages associated with on-chip copy. For example, on-chip copy requires that data be programmed in the destination page in the same order/format as the data is stored in the source page. As another example, on-chip copy can be susceptible to the accumulation of program and sense errors, as moving data many times with an on-chip copy operation can cause decode errors. To address this issue, a hybrid off-chip/on-chip copy operation can be used, in which data read from the source page is both stored in data latches in the memory (as in an on-chip copy operation) and sent to the controller (as in an off-chip copy operation), which tests the integrity of the data. If the data is valid, the data stored in the data latches in the memory is simply programmed to the destination page without toggling the data back from the controller to the memory, thereby cutting the data toggle time in half compared to using a typical off-chip copy operation.
Overview
Embodiments of the present invention are defined by the claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the below embodiments relate to a storage module and method for on-chip copy gather. In one embodiment, a storage module is provided with a memory comprising a plurality of word lines and a plurality of data latches. The memory copies data from a first word line into a first data latch and copies data from a second word line into a second data latch. The memory then copies only some of the data from the first data latch and only some of the data from the second data latch into a third data latch. After that, the memory copies the data from the third data latch to a third word line.
In another embodiment, a storage module is provided comprising a memory and an on-chip copy gather module. The on-chip copy gather module is configured to use a plurality of data latches in the memory to gather data from portions of source word lines in the memory and copy the gathered data to a destination word line in the memory. In yet another embodiment, a storage module is provided comprising a memory and a controller. The controller is configured to gather data from portions of a plurality of source word lines in the memory and copy the gathered data to a destination word line while preventing accumulation of errors from bad columns in the memory.
Other embodiments are possible, and each of the embodiments can be used alone or together in combination. Accordingly, various embodiments will now be described with reference to the attached drawings.